A. R. Jha, J. Z. Yu, U. Mathur, T. E. Carlson, and P. Saxena, “Language-based Hardware Communication Safety and Liveness,” in Workshop on Languages, Tools, and Techniques for Accelerator Design (LATTE), Pittsburgh, PA, USA, Mar. 2026. Preprint
J. Z. Yu, A. R. Jha, U. Mathur, T. E. Carlson, and P. Saxena, “Anvil: A General-Purpose Timing-Safe Hardware Description Language,” in Proceedings of the 31st ACM International Conference on Architectural Support for Programming Languages and Operating Systems, Volume 2, in ASPLOS ’26. Pittsburgh, PA, USA: Association for Computing Machinery, Mar. 2026, pp. 110–136. doi: 10.1145/3779212.3790125. Preprint
2025
J. Z. Yu, F. Han, K. Choudhury, T. E. Carlson, and P. Saxena, “Securing Mixed Rust with Hardware Capabilities,” in Proceedings of the 2025 ACM SIGSAC Conference on Computer and Communications Security, in CCS ’25. New York, NY, USA: Association for Computing Machinery, Nov. 2025, pp. 1544–1558. doi: 10.1145/3719027.3744861.
J. Z. Yu, M. Li, A. Badole, T. E. Carlson, M. Swift, and P. Saxena, “Caplification: Bridging Capability-Aware and Capability-Oblivious Software,” in Proceedings of the 30th ACM Symposium on Access Control Models and Technologies, in SACMAT ’25. New York, NY, USA: Association for Computing Machinery, Jul. 2025, pp. 33–44. doi: 10.1145/3734436.3734449.